Input-aware heuristic with high-level synthesis of approximate hardware

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Almeida, Tiago da Silva; Felzmann, Isaías Bittencourt; Wanner, Lucas Francisco, 2026, "Input-aware heuristic with high-level synthesis of approximate hardware", https://doi.org/10.25824/redu/7NKNXZ, Repositório de Dados de Pesquisa da Unicamp, V1

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Description	This repository provides the experimental dataset and supporting files generated for an input-aware approximate computing framework targeting HLS-based accelerators. The data were produced using an approach that maps accelerator operators, such as adders and multipliers, to a library of precharacterized approximate components in order to reduce hardware resource utilization while controlling output errors. Applications were executed with representative training inputs, and candidate approximate designs were selected using a combined metric of output error and estimated resource usage. The dataset includes results for image processing and CNN workloads, showing that the approach can reduce LUT and FF usage by up to 55% for less than 25% output degradation, and achieve similar savings for a CNN model with less than 0.8% accuracy degradation. The repository contains application source code, configuration files, datasets, Jupyter notebooks, and component characterization data. For each application, the corresponding folder includes setup files, training and testing datasets, error evaluation scripts, hardware source code templates for Vitis, and a CSV file with component features related to error and LUT+FF utilization.
Subject	Computer and Information Science; Engineering
Keyword	Approximate computing, Error propagation, High-level synthesis, FPGA
Related Publication	T. Almeida, I. Felzmann, and L. Wanner, “A heuristic approach for near Pareto-optimal design space exploration in Approximate High-Level Synthesis,” Integration, vol. 108, p. 102638, May 2026. doi: https://doi.org/10.1016/j.vlsi.2025.102638
Notes	This source code for reproductability can be found at https://github.com/almeidatiago/iah_ahls. The image input dataset employed in the experimental evaluation can be accessed at https://github.com/almeidatiago/image_dataset
License/Data Use Agreement	CC BY-NC 4.0

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	iah_ahls2.zip ZIP Archive - 69.5 KB Published Jan 19, 2026 0 Downloads MD5: dd948b7c33377d75787cb32e9c104d94	Access File ???file.accessBtn.header.access??? Public Download Options ZIP Archive ???file.accessBtn.header.metadata??? Data File Citation EndNote XML RIS BibTeX

Citation Metadata

Persistent Identifier	doi:10.25824/redu/7NKNXZ
Publication Date	2026-01-19
Title	Input-aware heuristic with high-level synthesis of approximate hardware
Author	Almeida, Tiago da Silva (Universidade Estadual de Campinas (UNICAMP). Instituto de Computação.) - ORCID: https://orcid.org/0000-0002-0420-4188 Felzmann, Isaías Bittencourt (Universidade Estadual de Campinas (UNICAMP). Instituto de Computação.) - ORCID: https://orcid.org/0000-0003-3048-8310 Wanner, Lucas Francisco (Universidade Estadual de Campinas (UNICAMP). Instituto de Computação.) - ORCID: https://orcid.org/0000-0002-5564-698X
Point of Contact	Use email button above to contact. Wanner, Lucas Francisco (Universidade Estadual de Campinas (UNICAMP). Instituto de Computação.)
Description	This repository provides the experimental dataset and supporting files generated for an input-aware approximate computing framework targeting HLS-based accelerators. The data were produced using an approach that maps accelerator operators, such as adders and multipliers, to a library of precharacterized approximate components in order to reduce hardware resource utilization while controlling output errors. Applications were executed with representative training inputs, and candidate approximate designs were selected using a combined metric of output error and estimated resource usage. The dataset includes results for image processing and CNN workloads, showing that the approach can reduce LUT and FF usage by up to 55% for less than 25% output degradation, and achieve similar savings for a CNN model with less than 0.8% accuracy degradation. The repository contains application source code, configuration files, datasets, Jupyter notebooks, and component characterization data. For each application, the corresponding folder includes setup files, training and testing datasets, error evaluation scripts, hardware source code templates for Vitis, and a CSV file with component features related to error and LUT+FF utilization.
Subject	Computer and Information Science; Engineering
Keyword	Approximate computing Error propagation High-level synthesis FPGA
Related Publication	T. Almeida, I. Felzmann, and L. Wanner, “A heuristic approach for near Pareto-optimal design space exploration in Approximate High-Level Synthesis,” Integration, vol. 108, p. 102638, May 2026. doi: https://doi.org/10.1016/j.vlsi.2025.102638 https://www.sciencedirect.com/science/article/pii/S0167926025002950
Notes	This source code for reproductability can be found at https://github.com/almeidatiago/iah_ahls. The image input dataset employed in the experimental evaluation can be accessed at https://github.com/almeidatiago/image_dataset
Language	English
Contributor	Funder : Fundo de Apoio ao Ensino, Pesquisa e Extensão: FAEPEX: 3770/25 Funder : Fundo de Apoio ao Ensino, Pesquisa e Extensão: FAEPEX: 2622/25
Funding Information	Conselho Nacional de Desenvolvimento Científico e Tecnológico: CNPQ: 306314/2025-8 Coordenação de Aperfeiçoamento de Pessoal de Nível Superior: CAPES: 001
Depositor	Almeida, Tiago da Silva
Deposit Date	2026-01-08
Declarações obrigatórias sobre ética e privacidade	o projeto que gerou os dados foi aprovado pelo Comite de Ética em Pesquisa da Unicamp ou não envolve questões que requeiram tal aprovação; os dados que serão depositados estão de acordo com a LGPD (Lei Geral de Proteção de Dados)

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